In many high performance microprocessor-based computer systems, the computer system clock speed is usually much faster than various system cycle times, such as hold cycles, and memory cycles. This is especially a problem with a computer system architecture such as that of the IBM PC-AT for instance when it accesses the relatively slow peripheral bus. (Such accesses are referred to herein as "AT cycles.") During such relatively slow cycle types, the CPU (the microprocessor) has conventionally been held in a wait state with the CPU clock still operating at the same (high) speed. The problem with this is that in CMOS circuits (such as a microprocessor), power dissipation is directly proportional to the clock frequency. Thereby this mode of operation wastes precious power (particularly in battery operated computer systems) to keep the CPU running at full speed while the CPU is being held in a wait state, since the CPU clocking performs no useful function at this time. A CPU such as the Intel 486 microprocessor dissipates approximately 4 watts of power at 33 MHz operating frequency.